::: vuaskari.com ::: CS501 QUIZ NO.3 DATED JAN 10, 2013

CS501 Advance Computer Architecture

Quiz No.3  JAN 10,2013

 

_________ is a technique in which some of the CPU's address lines forming an input to the address decoder are ignored.

Microprogramming

Instruction pre-fetching

Pipelining

Partial Decoding

 

An Interface that can be used to connect the microcomputer bus to ______________ is called an I/O port

Flip flops

Memory

Peripherals devices

Multiplexes

 

Connection to a CPU that provides a data path between the CPU and external devices, such as a keyboard, display, or reader is called-----------

Buffer

I/O port

Memory mapping

Processor

 

In which one of the following methods for resolving the priority, the device with the highest priority is placed in the first position, followed by lower-priority devices up to the device with the lowest priority which is placed last in the series?

Asynchronous

Daisy-Chaining Priority

Parallel

Semi-synchronous

 

Identify the type of serial communication error condition in which A 0 is received instead of a stop bit (which is always a 1)?

Framing error

Parity error

Overrun error

Under-run error

 

Where does the processor store the address of the first instruction of the ISR?

Interrupt vector

Interrupt request

Interrupt handler

All of the given Options

 

Identify the following type of serial communication error condition: "The prior character that was received was not still read by the CPU and is over written by a new received character."

Framing error

Parity error

Overrun error

Under-Run error

 

In ____________ a separate address space of the CPU is reserved for I/O operations

Isolated I/O

Memory Mapped I/O

All of the above

None of above

 

 

Every time you press a key, an interrupts is generated. This is an example of

Hardware Interrupt

Software Interrupt

All of the given

None of the given

 

 

_________ is an electrical pathway through which the processor communication with the internal and external devices attached to the computer.

Computer Bus

Hazard

Memory

Disk

 

Where does the processor store the address of the first instruction of the ISR?
Select correct option:
Interrupt vector
Interrupt request
Interrupt handler
All of the given options


In ________, a separate address space of the CPU is reserved for I/O operations.
Select correct option:
Isolated I/O
Memory Mapped I/O
All of above
None of above


-------------- is the time needed by the CPU to recognize (not service) an interrupt request.
Select correct option:
Interrupt Latency
Response Deadline
Timer delay
Throughput


Question # 4
_________ is a technique in which some of the CPU's address lines forming an input to the address decoder are ignored.
Select correct option:
Microprogramming
Instruction pre-fetching
Pipelining
Partial decoding


Question # 5
How can you define an interrupt? 
Select correct option:
A process where an external device can speedup the working of the microprocessor
A process where memory can speed up programs execution speed
A process where an external device can get the attention of the microprocessor    

A process where input devices can takeover the working of the microprocessor


Question # 6
An interface that can be used to connect the microcomputer bus to ________is called an I/O Port.

Select correct option:
Flip Flops
Memory
Peripheral devices
Multiplexers


Question # 7
Every time you press a key, an interrupt is generated. This is an example of
Select correct option:
Hardware interrupt
Software interrupt
All of the given
None of the given


Question # 8
Identify the following type of serial communication error condition: "The prior character that was received was not still read by the CPU and is over written by a new received character."
Select correct option:
Framing error
Parity error
Overrun error
Under-run error


Question # 9
A software routine performed when an interrupt is received by the computer is called as ---------

Select correct option:
Interrupt
Interrupt handler
Exception
Trap


Which one of the following methods for resolving the priority makes use of individual bits of a priority encoder?
Select correct option:
Daisy-Chaining Priority
Asynchronous Priority
Parallel Priority
Semi-synchronous Priority

In which one of the following methods for resolving the priority, the device with the highest priority is placed in the first position, followed by lower-priority devices up to the device with the lowest priority, which is placed last in the series?

Select correct option:

Asynchronous

Daisy-Chaining Priority

Parallel

Semi-synchronous

In ________, a separate address space of the CPU is reserved for I/O operations.

Select correct option:

Isolated I/O

Memory Mapped I/O

All of above

None of above

Identify the following type of serial communication error condition: "The prior character that was received was not still read by the CPU and is over written by a new received character."

Select correct option:

Framing error

Parity error

Overrun error

Under-run error

 

 

Identify the following type of serial communication error condition in which no character is available at the beginning of an interval.

Select correct option:

Framing error

Parity error

Overrun error

Under-run error

 

Which one of the following methods for resolving the priority makes use of individual bits of a priority encoder?

Select correct option:

Daisy-Chaining Priority

Asynchronous Priority

Parallel Priority

Semi-synchronous Priority

A software routine performed when an interrupt is received by the computer is called as ---------

Select correct option:

Interrupt

Interrupt handler

Exception

 Trap

 

_________ is a technique in which some of the CPU's address lines forming an input to the address decoder are ignored.

Select correct option:

 Microprogramming

 Instruction pre-fetching

 Pipelining

 Partial decoding

 

Identify the type of serial communication error condition in which A 0 is received instead of a stop bit (which is always a 1)?

Select correct option:

 Framing error

 Parity error

 Overrun error

 Under-run error

 

Where does the processor store the address of the first instruction of the ISR?

Select correct option:

 Interrupt vector

 Interrupt request

 Interrupt handler

 All of the given options

 

Which one of the following is NOT a technique used when the CPU wants to exchange data with a peripheral device?

Select correct option:

Direct Memory Access (DMA)

Interrupt driven I/O

Programmed I/O

Virtual Memory

 

A software routine performed when an interrupt is received by the computer is called as ---------

InterruptC

Interrupt handler

Exception

Trap

 

Which one of the following methods for resolving the priority makes use of individual bits of a priority encoder?

Daisy-Chaining  Priority

Asynchronous Priority

Parallel Priority

Semi-synchronous  Priority

 

 

-------------- is the time needed by the CPU to recognize (not service) an interrupt request.

Interrupt Latency

Response Deadline

Timer delay

Throughput

 

______ is an electrical pathway through which the processor communicates with the internal and external devices attached to the computer.

Computer Bus

Hazard

Memory

Disk

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